CS2354 ADVANCED COMPUTER ARCHITECTURE LECTURE NOTES PDF
Dear students here we provide notes for Anna university 6TH sem Subject CS ADVANCED COMPUTER ARTCHITECTURE notes pdf. you can download. ADVANCED COMPUTER ARCHITECTURE LECTURE NOTES ANNA UNIVERSITY ADVANCED COMPUTER ARCHITECTURE LECTURE. CS ADVANCED COMPUTER ARCHITECTURE. UNIT – I. 2 Marks. is ILP .. Statically scheduled. – Dynamically scheduled (see previous lecture).
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Lecture Plan Subject Code: CS Name of the subject: Instruction-level parallelism ILP is the potential overlap the execution of instructions using pipeline concept to improve performance of the system. The various techniques that are used to increase amount of parallelism are reduces the impact of data and control hazards and increases processor ability to exploit parallelism There are two approaches to exploiting ILP.
Static Technique — Software Dependent 2. Dynamic Technique — Hardware Dependent Technique Forwarding and bypassing Delayed branches and simple branch scheduling Basic dynamic scheduling scoreboarding Dynamic scheduling with renaming Dynamic branch prediction Issuing multiple instructions per cycle Speculation Dynamic memory disambiguation Loop unrolling Basic compiler pipeline scheduling Compiler dependence analysis Software pipelining, trace scheduling Compiler speculation Reduces Potential data hazard stalls Control hazard stalls Data hazard stalls from true dependences Data hazard stalls and stalls from anti dependences and output dependences Control stalls Ideal CPI Data hazard and control hazard stalls Data hazard stalls with memory Control hazard stalls Data hazard stalls Ideal CPI, data hazard stalls Ideal CPI, data hazard stalls Ideal CPI, data, control stalls 1.
Here is a simple example of a loop, which adds two element arrays, that is completely parallel: Various types of Dependences in ILP. Data Dependence and Hazards: To exploit instruction-level parallelism, determine which instructions can be executed in parallel. If two instructions are parallel, they can execute simultaneously in a pipeline without causing any stalls.
If two instructions are dependent they are not parallel and must be executed in order. There are three different types of dependences: An instruction j is data dependent on instruction i if either of the following holds: The second condition simply states that one instruction is dependent on another if there exists a chain of dependences of the first type between the cs2534 instructions. This dependence chain can be as long as the entire program.
Anna University CS ADVANCED COMPUTER ARCHITECTURE (ACA) NOTES
Executing the instructions simultaneously will cause a processor with pipeline interlocks to detect a hazard and stall, thereby reducing or eliminating the overlap. Dependences are a property of programs. Whether a given dependence results in an actual hazard being detected and whether that hazard actually causes a stall are properties of the pipeline organization.
This difference is critical to understanding how instruction-level parallelism can be exploited. The presence of the dependence indicates the potential for a hazard, but the actual hazard and the length of any stall is a property of the pipeline. The importance of the data dependences is that a dependence 1 indicates the possibility of a hazard, 2 Determines the order in which results must be calculated, and coputer Sets an upper bound on how much parallelism can possibly be exploited.
Name Dependences The name dependence occurs when two instructions use the same register or memory location, called a name, but there is no flow of data between the instructions associated with that name.
There archiitecture two types of name dependences between an instruction i that precedes instruction j in program order: The original ordering must be preserved to ensure that i reads the correct value. The ordering between the instructions must be preserved to ensure that the value finally written corresponds to instruction j.
Both anti-dependences and output dependences are name dependences, as opposed to true data dependences, afvanced there is no value being transmitted between the instructions.
Since a name dependence is not a true dependence, instructions involved in a name dependence can execute simultaneously or be reordered, if the name register number or memory location used in the instructions is changed so the instructions do not conflict. This renaming can be more easily done for register operands, where it is called register renaming.
Register renaming can be done either statically by a compiler or dynamically by the advancer.
Advanced Computer Architecture(ACA) – CS – Anna university – CSE – 6th semester – question bank
A control dependence determines the ordering of an instruction, i, with respect to a branch instruction so that the instruction i is executed in correct program order.
Every instruction, except for those in the first basic block of the program, is control dependent on some set of branches, and, in general, these control dependences must be preserved to preserve program order.
For example, in the code segment: In general, there are two constraints imposed by control dependences: An instruction that is control dependent on a branch cannot be moved before the branch so that its execution is no longer controlled by the branch. For example, we cannot take an instruction from the then-portion of an if-statement and move it before the ifstatement. Add Cw2354 to Favourite Add to classroom.
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